IPDPS 2026 Keynote Speakers

IPDPS 2026 WEDNESDAY KEYNOTE SPEAKER

Uzi Vishkin
University of Maryland
Recipient of the 2026 IEEE Charles Babbage Award

The Ideal of General-Purpose Parallelism

ABSTRACT: The history of transformative research is often told through specific achievements: a flag on the lunar surface, a completed map of the human genetic code, or a machine that can converse with human-like nuance. However, the profound legacy of ideals like the Moonshot, the Human Genome Project, and Artificial Intelligence lies not in the fulfillment of their central goals, but in the massive, self-sustaining ecosystems they generate. These "research ideals" function as gravity wells, pulling in disparate industries, inspiring secondary benefits that sometimes far exceed the value of the original objective. I will argue that the ideal of general-purpose parallelism has been an under-credited member of this exclusive club of high impact ideals.

The nearly half-century research quest of extending the general-purpose serial random-access machine (RAM) model and its coupling with von-Neumann’s stored-program, program-counter type architectures towards the general-purpose parallelism ideal will be reviewed. To me, the quest comprised the “think parallel” parallel random-access machine (PRAM) model, the PRAM algorithmic theory, its coupling with the PRAM-On-Chip XMT many-core architecture and their extensive prototyping, including commitment to silicon. The talk will: (i) zoom-in on specifics in the achievement of the ideal, (ii) describe the chicken-and-egg commercialization challenge of establishing a killer app for this powerful technology, and (iii) zoom out to observe the massive ecosystem it inspired.

BIO: Conjecturing in 1979 that transition to parallelism could become the only paradigm shift in core computing during his professional lifetime, Uzi Vishkin strategized his research career into three stages.1. Faced with a build-first-figure-out-how-to-program-later mindset from the computer systems community and dominance of the NC complexity theory in the theory community, Vishkin’s first stage aimed to crystalize the notion of work-efficient parallel algorithmic thinking towards system specification at a later stage. Going against the grain proved fruitful. Parallel algorithms textbooks and survey adopted his work-depth (WD) methodology and incorporated tens of the PRAM algorithm he and colleagues invented, including: symmetry breaking techniques including deterministic coin tossing (applied also in distributed computing), integer sorting (precursor to map-reduce), finding lowest common ancestors in trees, Euler tour technique, parallel graph algorithms for connectivity and biconnectivity, string matching techniques such as witnesses and deterministic sampling, approximate string matching, and 2-3 trees, and introduced their fit into an elegant structure---unusual for combinatorics or algorithms—including more advanced algorithms such as triconnectivity and maxflow.  2. The second stage was to invent the XMT architecture, have it prototyped including commitment to silicon and demonstration that as-is WD algorithms can achieve competitive results, refuting a broad presumption that PRAM is unrealistic. His 2005 hybrid memory for serial and parallel computing has been a precursor to CPU-integrated parallel accelerators, such as integrated GPUs, in Billions of devices including PCs, laptops and smartphones starting in the early 2010s. Over a thousand students at a single high school demonstrated the ease of programming of XMT. 3. The third, and current, stage is R&D towards “killer apps” for the approach.

EDUCATION, APPOINTMENT & HONORS: B.Sc. and M.Sc. in Mathematics, Hebrew University. D.Sc., Computer Science, Technion, 1981-1982: Post-doc, IBM Thomas J. Watson Research Center.1982 to 1984:  department of computer science at New York University; remained affiliated till 1988. 1984 to 1997: Professor of computer science, Tel Aviv University. 1987 to 1988: CS Chair. 1988 and on: Professor of Electrical and Computer Engineering and permanent member of the University of Maryland Institute for Advanced Computer Studies (UMIACS). Uzi Vishkin is ACM Fellow for, among other things, having “played a leading role in forming and shaping what thinking in parallel has come to mean in the fundamental theory of Computer Science,” Fellow of the National Academy of Inventors (NAI), and winner of the ACM-SPAA Parallel Computing Award. He was also an ISI-Thompson Highly Cited Researcher.

IPDPS 2026 THURSDAY KEYNOTE SPEAKER

Hyesoon Kim
Georgia Institute of Technology

Open-Source GPU Hardware and Software: Challenges and Lessons Learned

ABSTRACT: Heterogeneous computing has become the dominant computing platform in the era of accelerators. With the growth of data-intensive computing and the demand for high throughput, GPUs have become a primary engine for high-performance computing, scientific applications, and modern parallel workloads.

Inspired by the open-source hardware community built around the RISC-V ISA, we have been developing an OpenGPU by extending the RISC-V ISA. The OpenGPU project started to provide a full-stack platform that supports reproducible research and real-world prototyping, with an emphasis on hardware. Over time, the project has evolved into both hardware and software ecosystems. The OpenGPU aims to provide a full stack of GPU capabilities, including running OpenCL/CUDA workloads, supporting 3D graphics pipelines, and enabling machine learning workloads. In parallel, we have developed Cupbop, which enables CUDA to run on a broad range of parallel processors, including x86, ARM, RISC-V, RISC-V GPUs, and AMD GPUs.

One of the biggest challenges of open-source GPU projects is sustaining usability while the stack evolves across hardware and software. In this keynote, I will discuss the challenges and lessons learned from building and maintaining an open-source GPU hardware platform (Vortex), its software stack, and companion software efforts. I will cover practical issues such as maintaining a usable compiler/runtime toolchain, ensuring correctness and debuggability across HW/SW boundaries, supporting real workloads while preserving research agility, and building a sustainable open-source workflow for a broader community. I will also discuss future opportunities related to generative AI.

BIO: Hyesoon Kim is a professor in the School of Computer Science, College of Computing at the Georgia Institute of Technology, where she leads the HPArch research group and is a co-director of the Center for Research into Novel Computing Hierarchies (CRNCH). Her research focuses on the intersection of computer architecture, compilers, and runtime systems, with an emphasis on GPUs, heterogeneous architectures, and near-data processing, and she develops open-source research infrastructure such as MacSim (GPU/heterogeneous system modeling) and Vortex (an open-source RISC-V GPU platform) to enable reproducible full-stack experimentation. She is a recipient of the NSF CAREER Award and is a member of the MICRO/HPCA Hall of Fame. She is an IEEE Fellow and the chair of IEEE TCuARCH.

IPDPS 2026 FRIDAY KEYNOTE SPEAKER

R. Iris Bahar
Colorado School of Mines

Teaching Interdisciplinary and Inclusive Courses to Computer Scientists, Engineers, and Beyond

ABSTRACT: Art, design, computing, and discipline-specific engineering principles are often taught in a siloed fashion. This approach leaves students with a missed opportunity to work together in interdisciplinary teams and learn valuable technical and non-technical skills from one another. This talk will lay out my journey to design and teach more interdisciplinary and inclusive courses to engineers, computer scientists, and beyond. In one of my courses that I will highlight in my talk, I will discuss how I collaborated with an artist to build whimsical, interactive robots, and along the way allowed students to explore issues regarding spirit, technology, ethics, and sustainability. My talk concludes with some thoughts on the future of STEM education and how courses may be made more inclusive, collaborative, and engaging.

BIO: R. Iris Bahar received the B.S. and M.S. degrees in computer engineering from the University of Illinois, Urbana-Champaign, and the Ph.D. degree in electrical and computer engineering from the University of Colorado, Boulder. She is a faculty member in the Computer Science Department at the Colorado School of Mines, where she currently serves as their Department Head. Before joining Mines, she was on the faculty at Brown University for 26 years and held dual appointments as Professor of Engineering and Professor of Computer Science. Her research interests focus on energy-efficient and reliable computing, from the system level to device level. She is the recipient of the Marie R. Pistilli Women in Engineering Achievement Award, the Brown University School of Engineering Award for Excellence in Teaching in Engineering, the 2022 University of Illinois ECE Department Distinguished Alumni Award and the 2024 IEEE Field Medal in Undergraduate Teaching. Iris is an IEEE fellow and an ACM Distinguished Scientist.